This invention relates generally to structures and methods for integrated circuits and more specifically to integrated circuit ferroelectric transistors.
Random access memory integrated circuits typically contain millions of essentially identical cells integrated on a single-crystal silicon substrate, each cell capable of storing one bit of digital information. Dynamic random access memory (DRAM) cells are popular because of their relatively simple cell structure, usually consisting of a single capacitor storage element coupled to an access transistor. However, DRAM memory is volatile and must be frequently refreshed to maintain data integrity. Also, reading the data stored in a DRAM cell is a destructive process, such that the data must be rewritten each time it is read. A further problem with the basic DRAM structure is the inherent difficulty in scaling the memory cell to smaller size, since the charge storage requirements for the cell capacitor do not scale proportionally. As a result, alternative materials and structures are now receiving serious consideration for memory applications.
Ferroelectric random access memory (FRAM) structures make use of the remanent polarization properties of a ferroelectric material to store data. FRAMs may generally be divided into two types, depending on whether a ferroelectric capacitor or a ferroelectric transistor is used as the storage element in a memory cell. A capacitor-based FRAM is similar to a DRAM in operation and basic layout, and while it may have the advantage of non-volatile data storage, it still has a destructive readout and a scaling problem. In contrast, transistor-based FRAM cells are generally more complex, but in theory offer higher performance; such cells have been proposed with both non-volatile storage and non-destructive readout features. Unfortunately, researchers have been largely unsuccessful in their attempts to deposit ferroelectric thin films as gate dielectrics directly upon silicon transistors, a necessary step for commercial development of these basic transistor FRAMs.
An alternative FRAM structure is disclosed by Evans et al in U.S. Pat. No. 5,119,329, issued Jun. 2, 1992, which avoids interfacing ferroelectric material directly with a silicon substrate by using a thin film semiconductor overlying a ferroelectric thin film as the storage device. The thin film semiconductor operates as a variable resistor with resistance set by the polarization state of the ferroelectric material such that data may be read from the device by sensing the resistance of the thin film semiconductor which overlies the ferroelectric material.
The present invention provides a novel method and ferroelectric structure for overcoming the difficulties found in prior art ferroelectric device fabrication and utilization, by integrating a ferroelectric variable resistor and a silicon transistor in a single device. This is apparently the first ferroelectric structure to combine a thin film ferroelectric variable resistor and a substrate (e.g. silicon) transistor, using a semiconducting thin film which is common to both. This novel structure can provide fast access times, non-volatile storage, non-destructive readout, and has wide application including, but not limited to, memory, programmable logic, multi-state logic, and programmable variable resistors (e.g. for neural network applications).
The structure of the present invention provides many advantages over prior art structures, both in operation and in fabrication. For instance, the substrate transistor may be largely identical to other transistors integrated on the same circuit, up to and including the gate dielectric. The thin film semiconductor may be selected to provide compatibility with both this gate dielectric and the ferroelectric material (many oxide semiconductors are particularly suited for such an application). The structure also advantageously avoids direct ferroelectric material/silicon interfaces and their related problems.
Additionally, the present invention solves a problem with thin film semiconducting materials. Because these materials are typically polycrystalline, they do not generally provide the on/off resistance ratios and process controllability achievable with bulk single-crystal silicon. However, the transistor of the present invention is self-amplifying and preferably uses the drain current of a silicon transistor as an output; this novel feature allows the device to be much smaller than prior art thin film semiconductor devices, and at the same time allows the device to operate reliably with extremely small access times. Also, because the output of the device is generally taken from the transistor fabricated in the substrate, properties of the thin film semiconductor are less critical; in some embodiments, criticality may be further reduced as important operational parameters are related to dimensionally adjustable ratios.
Generally, the present invention provides a structure for a microelectronic device. This device comprises a field effect transistor formed in a semiconducting substrate and having a semiconducting thin film gate electrode. The device may further comprise a ferroelectric thin film deposited on and overlapping at least a portion of the semiconducting thin film gate electrode. Preferably, a conductive electrode overlies the ferroelectric thin film and is used to set the polarization of the ferroelectric thin film.
In another aspect, the present invention provides a method of fabricating a semiconductor device, comprising depositing a gate dielectric thin film on a semiconducting substrate, depositing a semiconducting thin film on the gate dielectric thin film, and depositing a ferroelectric thin film on the semiconducting thin film. The method may further comprise depositing a conductive thin film on the ferroelectric thin film. Various patterning steps affecting one or more of the films may be combined with the method to produce a variety of related structures according to the present invention.
In yet another aspect, the present invention provides a method of producing a signal corresponding to the polarization state of a ferroelectric layer. The method may be used in a system having a ferroelectric layer interposed between a conducting electrode and a semiconducting thin film electrode, wherein the semiconducting thin film electrode also forms a gate electrode for a field effect transistor integrated into a substrate and having a source and a drain. The method comprises applying a first voltage to the conducting electrode and to a first end of the semiconducting thin film electrode, thereby causing a first current to flow laterally in the semiconducting thin film electrode and a second voltage to appear at a second end of the semiconducting thin film electrode, with the magnitude of the first current and the second voltage dependent on the polarization state of the ferroelectric layer. The method further comprises applying a third voltage across the source and drain of the field effect transistor, thereby causing a second current to flow between the source and drain of the field effect transistor, with the magnitude of the second current dependent on the first and second voltages, whereby the magnitude of the second current is an amplified signal dependent on the polarization state of the ferroelectric layer and the amplified signal is readable without altering the polarization state of the ferroelectric layer.